Current integration of 3D reminiscence applied sciences resembling high-bandwidth reminiscence [HBM] into AI accelerators has enhanced neural community efficiency. Nevertheless, the stacked constructions of 3D reminiscences lead to notable warmth accumulation as a result of lateral interfaces impede vertical warmth dissipation, thereby hindering efficient cooling. An efficient strategy to mitigating vitality consumption entails the utilization of nonvolatile reminiscence applied sciences, resembling resistive random-access reminiscence (RRAM). Integration of selector transistors with RRAM units mitigates sneak path leakage, will increase nonlinearity, and improves the reliability of vertically stacked arrays. However, executing core AI duties—resembling vector-matrix multiplication in neuromorphic computing—requires substantial present stream via these transistors, which in flip results in warmth technology, lowered energy effectivity, and potential computational errors. Moreover, densely stacked layers create hotspots and prohibit entry to cooling interfaces. This examine presents a comparative evaluation of fashions with numerous selector transistor configurations, primarily based on energy parameters from microfabricated 3D RRAM constructions. The outcomes point out that optimally positioning the selector transistor on the reminiscence interface can scale back nanoscale warmth accumulation by as much as 11%, as verified via finite-element simulations and numerical calculations. Improved thermal administration lowered peak native temperatures from over 160 °C to under 60 °C inside 20 nanoseconds in configurations that includes 10 to 100 stacked layers.
