Projected efficiency of Si- and 2D-material-based SRAM circuits starting from 16 nm to 1 nm expertise nodes

Chen, T.-A. et al. Wafer-scale single-crystal hexagonal boron nitride monolayers on Cu (111). Nature 579, 219–223 (2020).

Article 
CAS 
PubMed 

Google Scholar 

Li, T. et al. Epitaxial development of wafer-scale molybdenum disulfide semiconductor single crystals on sapphire. Nat. Nanotechnol. 16, 1201–1207 (2021).

Article 
CAS 
PubMed 

Google Scholar 

Wan, Y. et al. Wafer-scale single-orientation 2D layers by atomic edge-guided epitaxial development. Chem. Soc. Rev. 51, 803–811 (2022).

Article 
CAS 
PubMed 

Google Scholar 

Shen, P.-C. et al. Ultralow contact resistance between semimetal and monolayer semiconductors. Nature 593, 211–217 (2021).

Article 
CAS 
PubMed 

Google Scholar 

Li, W. et al. Approaching the quantum restrict in two-dimensional semiconductor contacts. Nature 613, 274–279 (2023).

Article 
CAS 
PubMed 

Google Scholar 

Wu, W.-C. et al. Scaled contact size with low contact resistance in monolayer 2D channel transistors. In 2023 IEEE Symposium on VLSI Expertise and Circuits (VLSI Expertise and Circuits) 1–2 (IEEE, 2023).

Huang, J.-Okay. et al. Excessive-κ perovskite membranes as insulators for two-dimensional transistors. Nature 605, 262–267 (2022).

Article 
CAS 
PubMed 

Google Scholar 

Illarionov, Y. Y. et al. Ultrathin calcium fluoride insulators for two-dimensional field-effect transistors. Nat. Electron. 2, 230–235 (2019).

Article 
CAS 

Google Scholar 

Li, W. et al. Uniform and ultrathin high-κ gate dielectrics for two-dimensional digital gadgets. Nat. Electron. 2, 563–571 (2019).

Article 
CAS 

Google Scholar 

Zhang, Y. et al. A single-crystalline native dielectric for two-dimensional semiconductors with an equal oxide thickness beneath 0.5 nm. Nat. Electron. 5, 643–649 (2022).

Article 
CAS 

Google Scholar 

Meng, W. et al. Three-dimensional monolithic micro-LED show pushed by atomically skinny transistor matrix. Nat. Nanotechnol. 16, 1231–1236 (2021).

Article 
CAS 
PubMed 

Google Scholar 

Zhu, J. et al. Low-thermal-budget synthesis of monolayer molybdenum disulfide for silicon back-end-of-line integration on a 200 mm platform. Nat. Nanotechnol. 18, 456–463 (2023).

Article 
CAS 
PubMed 

Google Scholar 

Naylor, C. H. et al. 2D supplies within the BEOL. In 2023 IEEE Symposium on VLSI Expertise and Circuits (VLSI Expertise and Circuits) 1–2 (IEEE, 2023).

Mii, Y.-J. Semiconductor improvements, from gadget to system. In 2022 IEEE Symposium on VLSI Expertise and Circuits (VLSI Expertise and Circuits) 276–281 (IEEE, 2022).

Chiu, M.-H. et al. Steel‐guided selective development of 2D supplies: demonstration of a backside‐up CMOS inverter. Adv. Mater. 31, e1900861 (2019).

Article 
PubMed 

Google Scholar 

Tong, L. et al. Heterogeneous complementary field-effect transistors based mostly on silicon and molybdenum disulfide. Nat. Electron. 6, 37–44 (2023).

CAS 

Google Scholar 

Wang, S. et al. Two-dimensional gadgets and integration in direction of the silicon traces. Nat. Mater. 21, 1225–1239 (2022).

Article 
CAS 
PubMed 

Google Scholar 

Dorow, C. et al. Advancing monolayer 2-D nMOS and pMOS transistor integration from development to Van der Waals interface engineering for final CMOS scaling. In IEEE Transactions on Electron Gadgets Vol. 68 (ed. Grudowski, P.) 6592–6598 (IEEE, 2021).

Liu, Y. et al. Guarantees and prospects of two-dimensional transistors. Nature 591, 43–53 (2021).

Article 
CAS 
PubMed 

Google Scholar 

Su, S.-Okay. et al. Perspective on low-dimensional channel supplies for very scaled CMOS. In 2022 IEEE Symposium on VLSI Expertise and Circuits (VLSI Expertise and Circuits) 403–404 (IEEE, 2022).

Quhe, R. et al. Sub-10 nm two-dimensional transistors: principle and experiment. Phys. Rep. 938, 1–72 (2021).

Article 
CAS 

Google Scholar 

Liu, C.-J. et al. 2D materials-based static random-access reminiscence. Adv. Mater. 34, e2107894 (2022).

Article 
PubMed 

Google Scholar 

Lee, T.-E. et al. Almost supreme subthreshold swing in monolayer MoS₂ top-gate nFETs with scaled EOT of 1 nm. In 2022 Worldwide Electron Gadgets Assembly (IEDM) 7.4.1–7.4.4 (IEEE, 2022).

Chou, A.-S. et al. Excessive-performance monolayer WSe₂ p/n FETs by way of antimony-platinum modulated contact expertise in direction of 2D CMOS electronics. In 2022 Worldwide Electron Gadgets Assembly (IEDM) 7.2.1–7.2.4 (IEEE, 2022).

Radisavljevic, B., Radenovic, A., Brivio, J., Giacometti, V. & Kis, A. Single-layer MoS₂ transistors. Nat. Nanotechnol. 6, 147–150 (2011).

Article 
CAS 
PubMed 

Google Scholar 

Lee, D., An, J. Y., Lee, C. H., Bong, Okay. W. & Kim, J. Usually Off WSe₂ nanosheet-based field-effect transistors with self-aligned contact doping. ACS Appl. Nano Mater. 5(12), 18462–18468 (2022).

Extra Moore White Paper (IEEE Worldwide Roadmap for Gadgets and Techniques (IRDS), 2016); https://irds.ieee.org/photos/recordsdata/pdf/2016_MM.pdf

Gupta, A. et al. Buried energy rail steel exploration in direction of the 1 nm node. In 2021 IEEE Worldwide Electron Gadgets Assembly (IEDM) 22.5.1–22.5.4 (IEEE, 2021).

Sakurai, T. Approximation of wiring delay in MOSFET LSI. IEEE J. Strong-State Circuits 18, 418–426 (1983).

Article 

Google Scholar